RC-Cache: Soft error mitigation techniques for low-leakage on-chip caches
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Minxuan Zhang | Yan Sun | Shaoqing Li | Chao Song | Yali Zhao | Minxuan Zhang | Shaoqing Li | Y. Sun | Chao Song | Yali Zhao
[1] Mahmut T. Kandemir,et al. Soft error and energy consumption interactions: a data cache perspective , 2004, Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758).
[2] Lorenzo Alvisi,et al. Modeling the effect of technology trends on the soft error rate of combinational logic , 2002, Proceedings International Conference on Dependable Systems and Networks.
[3] David Blaauw,et al. Drowsy caches: simple techniques for reducing leakage power , 2002, ISCA.
[4] Zhang Min-xuan. Design of Soft Error Immune Registers with Low Overhead , 2009 .
[5] Todd M. Austin,et al. A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor , 2003, MICRO.
[6] Shubu Mukherjee,et al. Architecture Design for Soft Errors , 2008 .
[7] Joel S. Emer,et al. The soft error problem: an architectural perspective , 2005, 11th International Symposium on High-Performance Computer Architecture.
[8] Todd M. Austin,et al. The SimpleScalar tool set, version 2.0 , 1997, CARN.
[9] Jaehyuk Huh,et al. Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency , 2008, 2008 41st IEEE/ACM International Symposium on Microarchitecture.
[10] Mahmut T. Kandemir,et al. Improving soft-error tolerance of FPGA configuration bits , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..
[11] Arijit Biswas,et al. Computing architectural vulnerability factors for address-based structures , 2005, 32nd International Symposium on Computer Architecture (ISCA'05).
[12] Joel Emer,et al. A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor , 2003, Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36..