Power Balance Scheme for Staircase Controlled Cascaded Multilevel Inverters

The output power of each cell in the cascaded multilevel inverters is not balanced when the staircase waveform synthesis strategy is adopted. This paper proposes two power balance strategy, one is active power balance strategies, and the other is swapping pulse strategies. The former strategies can realize power balance in an output cycle, however the total harmonics distortion (THD) of output voltage has a slight increase. The latter strategy has no effect on the output voltage, but the time for the power balance increases as the munber of cascaded cells increases. This paper analyzes the two proposed strategies and their characteristics in detail. Experimental results are presented to verify the validity of the proposed two power balance strategies.