Maximum reconfiguration of 2-D mesh systems with faults

It is desirable to reconfigure a faulty system in a way that the system size after reconfiguration is maximized while reconfiguration hardware overhead is kept low. This paper proposes a maximum reconfiguration scheme for 2-D mesh systems by retaining as many fault-free nodes in reconfigured subsystems as possible. The basic idea is to reconfigure a faulty mesh system into a maximum convex subsystem, using the fault-free upper or lower boundary nodes to compensate for the internal (i.e., non-boundary) faulty nodes. To this end, our reconfiguration problem is transformed into the well-known min-cost flow problem, for which an efficient polynomial algorithm is introduced. Our reconfiguration requires a channel width of two only and is shown by simulation to exhibit much better utilization of fault-free nodes than other schemes.

[1]  Fabrizio Lombardi,et al.  Reconfiguration of VLSI arrays by covering , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  F. Gail Gray,et al.  Reconfiguring fault-tolerant two-dimensional array architectures , 1994, IEEE Micro.

[3]  Jung Hwan Kim,et al.  The Rule-Based Approach to Reconfiguration of 2-D Processor Arrays , 1993, IEEE Trans. Computers.

[4]  Stephen Y. H. Su,et al.  Reconfiguration of VLSI/WSI Mesh Array Processors with Two-Level Redundancy , 1989, IEEE Trans. Computers.

[5]  Ronald L. Rivest,et al.  Introduction to Algorithms , 1990 .

[6]  Hee Yong Youn,et al.  A Highly Efficient Design for Reconfiguring the Processor Array in VLSI , 1988, ICPP.

[7]  Thomas Kailath,et al.  Reconfiguring Processor Arrays Using Multiple-Track Models: The 3-Track-1-Spare-Approach , 1993, IEEE Trans. Computers.

[8]  Jehoshua Bruck,et al.  Efficient fault-tolerant mesh and hypercube architectures , 1992, [1992] Digest of Papers. FTCS-22: The Twenty-Second International Symposium on Fault-Tolerant Computing.