Low-Power Features

This chapter discusses various low-power features available in the Cortex-M0 processor. The sleep modes can be further extended with vendor-specific sleep control features. Within the processor, both sleep modes behave similarly and the rest of the microcontroller can typically reduce power by applying different methods to these two modes. The Optional Wakeup Interrupt Controller (WIC) feature allows the clocks of the processor to be completely removed during deep sleep. The Cortex-M0 processor performance is several times higher than many popular 16-bit microcontrollers. This allows the same computational tasks to be carried out in shorter time, and the microcontroller can stay in sleep mode for longer period of time. The WIC enables the Cortex-M0 processor to reduce standby power consumption using a technology called State Retention Power Gating (SRPG). It is found that with SRPG, the leakage power of a sequential digital system during sleep can be minimized by powering off most parts of the logic, leaving a small memory element in each flip-flop to retain the current state.