An embedded flexible content-addressable memory core for inclusion in a Field-Programmable Gate Array
暂无分享,去创建一个
This paper describes a novel architecture for a content-addressable memory core which is intended to be included in a Field-Programmable Gate Array or an Embedded Programmable Logic Core. Compared to a standard content-addressable memory, our architecture allows for arbitrary data and tag widths; this flexibility is vital in FPGA applications, since the size of the data and tag fields are not known when the FPGA is manufactured.
[1] Steven J. E. Wilton. Embedded memory in FPGAs: recent research results , 1999, 1999 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM 1999). Conference Proceedings (Cat. No.99CH36368).
[2] Steven J. E. Wilton,et al. Programmable logic IP cores in SoC design: opportunities and challenges , 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).