Bounded Reachability Problems Are Decidable in FIFO Machines

Asynchronous distributed processes communicating using First In First Out (FIFO) channels are being widely used for distributed and concurrent programming. Since such systems of communicating processes, which communicate through (at least two) one-directional FIFO channels, can simulate Turing machines, most verification properties, such as testing the unboundedness of a channel, are undecidable for them [2, 12, 13]. Many papers from the 1980s to today have studied FIFO systems in which the inputlanguage of a channel (i.e. the set of words that enter in a channel) is included in the set of prefixes Pref (B) of a particular bounded language B = w∗ 1w 2 ...w∗ n. We call this class of FIFO machines input-bounded. When the set of letters that may enter in a channel c is reduced to a unique letter ac, then the input-language of c is included in ac and this subclass trivially reduces to VASS (Vector Addition Systems with States) and Petri nets [14]. A variant of the reachability problem, the deadlock problem, is shown decidable for input-letter-bounded FIFO systems in [8]. There are some other subclasses of this model for which some classical properties were shown decidable, such as monogeneous FIFO nets [5], linear FIFO nets [6], and flat systems [4, 7]. We may use the previous decidability results as an underapproximation for any general FIFO machines over bounded languages. While all the executions of the machine may not be input-bounded, we can use our methods to verify whether the executions conforming to this condition satisfy a given property. Moreover, if there is a bug in the restricted reachability set (or an unfavourable configuration is reached via an input-bounded execution), we can immediately deduce that the original machine is unsafe. Our contributions: We solve a problem left open in [8] regarding the decidability of the reachability problem for input-bounded FIFO machines. We construct a simulation of input-bounded FIFO machines by counter machines with restricted zero tests. We extend this result to other verification properties like unboundedness, control-state reachability and termination.