Invited Tutorial: Dynamatic: From C/C++ to Dynamically Scheduled Circuits

High-level synthesis tools, both commercial and academic, typically rely on static scheduling to produce high-throughput pipelines. However, in applications with unpredictable memory accesses or irregular control flow, these tools need to make pessimistic scheduling assumptions. In contrast, dataflow circuits implement dynamically scheduled circuits, in which components communicate locally using a handshake mechanism and exchange data as soon as all conditions for a transaction are satisfied. Due to their ability to adapt the schedule at runtime, dataflow circuits are suitable for handling irregular and control-dominated code. This paper describes Dynamatic, an open-source HLS framework which generates synchronous dataflow circuits out of C/C++ code. The purpose of this paper is to give an introductory overview of Dynamatic and demonstrate some of its use cases, in order to enable others to use the tool and participate in its development.

[1]  Paolo Ienne,et al.  An Out-of-Order Load-Store Queue for Spatial Computing , 2017, ACM Trans. Embed. Comput. Syst..

[2]  Paolo Ienne,et al.  Buffer Placement and Sizing for High-Performance Dataflow Circuits , 2020, FPGA.

[3]  Paolo Ienne,et al.  Shrink It or Shed It! Minimize the Use of LSQs in Dataflow Designs , 2019, 2019 International Conference on Field-Programmable Technology (ICFPT).

[4]  Paolo Ienne,et al.  From C to elastic circuits , 2017, 2017 51st Asilomar Conference on Signals, Systems, and Computers.

[5]  Paolo Ienne,et al.  Dynamically Scheduled High-level Synthesis , 2018, FPGA.

[6]  Hongbin Zheng,et al.  Polly – Polyhedral optimization in LLVM , 2012 .