SpC: synthesis of pointers in C: application of pointer analysis to the behavioral synthesis from C

As designers may model mixed software-hardware systems using a subset of C or C++, we present SpC, a solution to synthesize and optimize a C model with pointers. In hardware, a pointer is not only the address of data in memory, but it may also reference multiple variables mapped to registers, ports or wires. Pointer analysis is used to find the point-to-set of each pointer in the program. In this paper, we address the problem of synthesizing and optimizing pointers to multiple variables and array elements. Temporary variables are defined to optimize loads and stores by minimizing the number of live variables. The combinational logic can also be reduced by encoding the pointers values. An implementation using the SUIF framework is presented, followed by some case studies such as the synthesis of a 2D IDCT.

[1]  Giovanni De Micheli,et al.  High Level Synthesis of ASlCs un - der Timing and Synchronization Constraints , 1992 .

[2]  Ephraim Feig,et al.  New scaled DCT algorithms for fused multiply/add architectures , 1991, [Proceedings] ICASSP 91: 1991 International Conference on Acoustics, Speech, and Signal Processing.

[3]  Bjarne Stroustrup,et al.  C++ Programming Language , 1986, IEEE Softw..

[4]  Bjarne Steensgaard.  Points-to Analysis by Type Inference of Programs with Structures and Unions , 1996, CC.

[5]  Jörg Henkel,et al.  The COSYMA environment for hardware/software cosynthesis of small embedded systems , 1996, Microprocess. Microsystems.

[6]  Tiziano Villa,et al.  NOVA: State Assignment of Finite State Machines for Optimal Two-Level Logic Implementations , 1989, 26th ACM/IEEE Design Automation Conference.

[7]  S LamMonica,et al.  Efficient context-sensitive pointer analysis for C programs , 1995 .

[8]  Stan Y. Liao,et al.  An efficient implementation of reactivity for modeling hardware in the scenic design environment , 1997, DAC.

[9]  Diederik Verkest,et al.  Hardware/software co-design of digital telecommunication systems , 1997, Proc. IEEE.

[10]  Ron Cytron,et al.  Efficient accommodation of may-alias information in SSA form , 1993, PLDI '93.

[11]  Steven W. K. Tjiang,et al.  SUIF: an infrastructure for research on parallelizing and optimizing compilers , 1994, SIGP.

[12]  Giovanni De Micheli,et al.  Synthesis and Optimization of Digital Circuits , 1994 .

[13]  D. Soderman,et al.  Implementing C designs in hardware: a full-featured ANSI C to RTL Verilog compiler in action , 1998, Proceedings International Verilog HDL Conference and VHDL International Users Forum.

[14]  Monica S. Lam,et al.  Efficient context-sensitive pointer analysis for C programs , 1995, PLDI '95.

[15]  C.E. Stroud,et al.  Behavioral model synthesis with Cones , 1988, IEEE Design & Test of Computers.