Low-Power Level Shifter for Multi-Supply Voltage Designs

In this brief, a new low-power level shifter (LS) is presented for robust logic voltage shifting from near/sub-threshold to above-threshold domain. The new circuit combines the multi-threshold CMOS technique along with novel topological modifications to guarantee a wide voltage conversion range with limited static power and total energy consumption. When implemented in a 90-nm technology process, the proposed design reliably converts 180-mV input signals into 1-V output signals, while maintaining operational frequencies above 1-MHz, also taking into account process-voltage-temperature variations.Post-layout simulation results demonstrate that the new LS reaches a propagation delay less than 22 ns, a static power dissipation of only 6.4 nW, and a total energy per transition of only 74 fJ for a 0.2-V 1-MHz input pulse.

[1]  Anantha Chandrakasan,et al.  Embedded power supply for low-power DSP , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[2]  Borivoje Nikolić,et al.  Level conversion for dual-supply systems , 2003, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  Nobutaka Kuroki,et al.  A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs , 2012, IEEE Journal of Solid-State Circuits.

[4]  Kyoung-Hoi Koo,et al.  A new level-up shifter for high speed and wide range interface in ultra deep sub-micron , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[5]  Marco Lanuzza,et al.  Gate‐level body biasing technique for high‐speed sub‐threshold CMOS logic gates , 2014, Int. J. Circuit Theory Appl..

[6]  Kaushik Roy,et al.  Robust subthreshold logic for ultra-low power operation , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[7]  Chi-Ying Tsui,et al.  A robust, input voltage adaptive and low energy consumption level converter for sub-threshold logic , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

[8]  Snorre Aunet,et al.  Low-power subthreshold to above threshold level shifter in 90 nm process , 2009, 2009 NORCHIP.

[9]  Stuart N. Wooters,et al.  An Energy-Efficient Subthreshold Level Converter in 130-nm CMOS , 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

[10]  RoyKaushik,et al.  Robust subthreshold logic for ultra-low power operation , 2001 .

[11]  Jinhui Chen,et al.  Subthreshold to Above Threshold Level Shifter Design , 2006, Journal of Low Power Electronics.

[12]  David Blaauw,et al.  Energy-Efficient Subthreshold Processor Design , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[13]  A. Chavan,et al.  Ultra Low Voltage Level Shifters to Interface Sub and Super Threshold Reconfigurable Logic Cells , 2008, 2008 IEEE Aerospace Conference.

[14]  Dennis Sylvester,et al.  Single stage static level shifter design for subthreshold to I/O voltage conversion , 2008, Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08).

[15]  M. C. Chi,et al.  Gate Level Multiple Supply Voltage Assignment Algorithm for Power Optimization Under Timing Constraint , 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[16]  Ulrich Rückert,et al.  A Subthreshold to Above-Threshold Level Shifter Comprising a Wilson Current Mirror , 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.