A 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45° Strobe Phase for Energy-Efficient Skew Compensation

Skews between data and strobe signals can occur in HBM transceivers due to process and voltage variations across the base die. Skew compensation is introduced into the deserializers of our quarter-rate single-ended receiver for next-generation unmatched source-synchronous HBM interfaces. Data and strobe signals are energy-efficiently realigned by using a 45° strobe phase DQS45. This phase, which is equidistant between quadrature strobe phases DQS0 and DQS90, is generated by a digital type phase interpolator of our receiver. The transceiver, including the proposed receiver, was designed and fabricated in a 65nm CMOS process. The receiver corrects skews to within 7.8ps at a data-rate of 6.4Gb/s, with an energy cost of 0.83pJ/bit per pin.

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