Temperature-dependent bit-error rate of a clocked superconducting digital circuit
暂无分享,去创建一个
We measured the bit-error rate (BER) of an RS latch, a clocked SFQ circuit. A digital error-detection circuit was used to detect BER in the range unity to 10/sup -13/; below 10/sup -7/, the circuit was operated with a 12 GHz on-chip clock. BER was measured as a function of control current; both positive and negative control current was applied, leading to two distinct modes of error incidence. The error function curves extrapolate to 10/sup -80/ for optimal control current at a temperature of 5.5 K. Measurements were repeated over the range 3-7 K. Comparison to theoretical error-function estimates of BER indicate that the noise is strictly thermal.
[1] Quentin P. Herr,et al. Error rate of a superconducting circuit , 1996 .
[2] V. Semenov,et al. RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems , 1991, IEEE Transactions on Applied Superconductivity.
[3] Michael Tinkham,et al. Introduction to Superconductivity , 1975 .
[4] Q.P. Herr,et al. Error rate of RSFQ circuits: theory , 1997, IEEE Transactions on Applied Superconductivity.