NMOS C-V characterization of gate dielectric thickness / Anees Abdul Aziz ... [et al.]
暂无分享,去创建一个
In this report, the investigation has been carried out by using SILVACO Software tool is study on the effect of gate dielectric thickness on C-V characteristics for NMOS. The
project is being done by using ATHENA and ATLAS simulator in order to fabricate the NMOS. The parameter of gate dielectric such as temperature, HCl and time are being
used in order to get the suitable thickness to see the effect to C-V curve. Here, tox of 10.13nm at time = 11 minutes, and tox of 10.42nm at time 50 minutes with both HCl = 3% and temperature of 900oC being used for C-V graph .The effect to C’ox will be decreased by 12.3% when tox is 10.42nm. The low frequency and high frequency is
shown in C-V characteristics. As expected, the tox of 10.13nm produced high capacitance. The defect also can been seen by these C-V curve.