A 3.0–10.0 GHz UWB Low-Noise Amplifier with Forward Body bias Technique

ABSTRACT An ultra-wideband (UWB) low-noise amplifier (LNA) based on cascaded common source stage with shunt–shunt resistive feedback architecture is proposed. The wideband input impedance matching is accomplished by shunt–shunt resistive branch with inductor degeneration and parallel resistor-inductor-capacitor (RLC) load, forming two parallel RLC branches having inherently two wideband band-pass filter characteristics, resonating both at lower frequency and higher frequency. The output matching is achieved via a shunt inductor and a series resistor without the use of a buffer. Additionally, both series and shunt-inductive peaking techniques are employed in the proposed UWB LNA circuit design for bandwidth extension. To reduce the supply voltage headroom consumption, the forward body bias technique is also employed in the proposed topology. The resistor-capacitor (RC)-extracted results obtained in this paper are competitive in comparison with recent reported work in appreciating good noise figure (NF) performance as well as low-voltage headroom consumption. In the post-layout simulation results, the proposed complementary-metal-oxide-semiconductor (CMOS) UWB LNA dissipates only 13 mW while achieving the S11 below −11.4 dB, S22 below −11.7 dB, a flat S21 of 11.5 ± 0.6 dB, a maximum NF of 3.48 dB, within the range of 3.04 – 3.48 dB over the 3.0–10.0 GHz band of interest. Moreover, the IIP3 is within the range of −6.3 to −7.8 dBm, P1 dB of −14.7 to −16.8 as well as the K-factor of above 1 throughout the entire bandwidth operation, attesting the fact that the resistive feedback circuit is stable. The chip area consumption is approximated to 0.997 × 0.933 mm2.

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