Ultra low power ECG acquisition front-end with enhanced common mode rejection

An ultra low power low noise analog front-end for ECG signal acquisition is demonstrated. Compared to previously reported work, this front-end promises a significant increase in the Common Mode Rejection Ratio (CMRR) without any compromise in signal quality. Chopper stabilization and current reuse technique is employed in the instrumentation amplifier to further improve efficiency. A common mode feed back loop to minimize interferences is implemented which boosts the CMRR to 139 dB at 50 Hz. A complete single channel analog front-end chopped at 2 kHz is implemented in a TSMC 0.18 μm CMOS technology. Simulation results show that the front-end achieves an input referred noise voltage density of 90 nV/√Hz while consuming a current of 350 nA per channel from a 1.5 V power supply. The 1/f noise corner of the system is less than 10 Hz.

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