Multipath routing in TDM NoCs

The exponential increase in transistor count due to techno logical progress has resulted in an increase in complexity a nd processing power of on-chip elements. Recently a stage has been reached where it is not practical anymore to increase the core size, in either th e traditional CPU or embedded domain and as a consequence the number of core s, processing elements or peripherals is being increased inst ead. Providing an efficient interconnect for the increasing number of eleme nts is an important area of research. In this study we focus on improvi ng the efficiency of a network using alternative routing strategies. We focus on a multi-path slot allocation method in networks with static resource reservations, in particular TDM NoCs. The simplicity of these networks makes it possible to implement this routing scheme without s ignificant hardware overhead. Our proposed method, although displayi ng large variations between test cases, provides significant overal l gains in terms of allocated bandwidth, with an average gain across all test of 29% against an exhaustive search of single-path routes, and eve n larger gains of 47% when compared to other single-path routing algorithms.

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