A 1D numerical model for rapid stress analysis in bipolar junction transistors

Stress effects in semiconductor devices have gained significant attention in semiconductor industry in recent years, and numerical modeling is often used as a powerful tool for stress analysis in semiconductor devices. Here, we present a nontraditional 1D model for fast stress analysis in bipolar junction transistors. Because bipolar transistors are operationally 1D devices, it is possible to speed up the simulation with a 1D numerical model and get results that are comparable with 2D and 3D simulation outcomes. This model consists of a complete numerical algorithm that can be used for stress analysis of bipolar transistors on any plane. Existing 1D simulators take more time as they solve all device equations throughout the device. In contrast, our model optimizes the solutions for different regions with the development and inclusion of specific algorithms. A fractional starting point is introduced for the depletion region to speed up the process further. This way, faster computing time and much higher accuracy can be reached. At the same time, popular 2D and 3D simulators, which are using finite element methods, are naturally much slower, especially if high accuracy is needed. Simulation results of this 1D model match well with the simulation results of a 2D model developed with a commercial technology computer aided design TCAD tool. The validity of our model was verified with experimental results and theoretical expectations as well. Copyright © 2016 John Wiley & Sons, Ltd.

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