A blocker-tolerant wideband noise-cancelling receiver with a 2dB noise figure

As narrowband off-chip RF filtering is not compatible with the concept of software-defined radio (SDR), an SDR receiver must be designed to tolerate large out-of-band blockers with minimal gain compression and noise figure degradation. A recent circuit tackles this problem by dispensing with the LNA entirely. This mixer-first approach achieves impressive linearity, but at the expense of noise figure and, since such a receiver has no gain prior to down-conversion, the flicker noise corner can be unacceptably high. Other SDR attempts invariably use a noise-cancelling LNA at the front end, which provides wideband matching, however such approaches have either inadequate linearity or display too large a noise for our purposes. In this work, we propose a hybrid frequency-translational, noise-cancelling (FTNC) receiver that employs two separate down-conversion paths to enable noise cancelling with no voltage gain prior to base-band filtering. The resulting design has a sub-2dB noise figure and tolerates 0dBm blockers with no gain back-off, breaking the traditional noise-linearity trade-off common in all receivers.

[1]  E. Klumperink,et al.  Noise cancelling in wideband CMOS LNAs , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[2]  Rahim Bagheri,et al.  An 800MHz to 5GHz Software-Defined Radio Receiver in 90nm CMOS , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[3]  Caroline Andrews,et al.  A passive-mixer-first receiver with baseband-controlled RF impedance matching, ≪ 6dB NF, and ≫ 27dBm wideband IIP3 , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[4]  Minjae Lee,et al.  An 800-MHz–6-GHz Software-Defined Wireless Receiver in 90-nm CMOS , 2006, IEEE Journal of Solid-State Circuits.

[5]  George Chien,et al.  A SAW-less GSM/GPRS/EDGE receiver embedded in a 65nm CMOS SoC , 2011, 2011 IEEE International Solid-State Circuits Conference.

[6]  Jonathan Borremans,et al.  A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers , 2011, 2011 IEEE International Solid-State Circuits Conference.