Strained-silicon MOSFETs for analog applications: utilizing a supercritical-thickness strained Layer for low leakage current and high breakdown Voltage
暂无分享,去创建一个
Y. Hoshino | Y. Kondo | N. Sugii | M. Miyamoto | I. Yoshida | N. Sugii | S. Kimura | M. Kondo | M. Miyamoto | I. Yoshida | Y. Kondo | Y. Hoshino | W. Hirasawa | Y. Kimura | S. Kimura | M. Kondo | M. Hatori | W. Hirasawa | Y. Kimura | M. Hatori
[1] C.W. Liu,et al. Comprehensive low-frequency and RF noise characteristics in strained-Si NMOSFETs , 2003, IEEE International Electron Devices Meeting 2003.
[2] J.A. del Alamo,et al. Positive temperature coefficient of impact ionization in strained-Si , 2005, IEEE Transactions on Electron Devices.
[3] K. Jenkins,et al. Measurement of the effect of self-heating in strained-silicon MOSFETs , 2002, IEEE Electron Device Letters.
[4] Jung Houn Yap,et al. LETTER TO THE EDITOR: Film thickness constraints for manufacturable strained silicon CMOS , 2004 .
[5] N. Sugiyama,et al. Electron and hole mobility enhancement in strained-Si MOSFET's on SiGe-on-insulator substrates fabricated by SIMOX technology , 2000, IEEE Electron Device Letters.
[6] K. Rim,et al. Fabrication and analysis of deep submicron strained-Si n-MOSFET's , 2000 .
[7] M. Ieong,et al. Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs , 2003, IEEE International Electron Devices Meeting 2003.
[8] Nobuyuki Sugii,et al. Role of Si1−xGex buffer layer on mobility enhancement in a strained-Si n-channel metal–oxide–semiconductor field-effect transistor , 1999 .
[9] N. Sugii,et al. Generation of misfit dislocations and stacking faults in supercritical thickness strained-Si∕SiGe heterostructures , 2006 .
[10] N. Sugii,et al. Recrystallization, redistribution, and electrical activation of strained-silicon/Si0.7Ge0.3 heterostructures with implanted arsenic , 2004 .
[11] G. Rozgonyi,et al. Formation of cylindrical n/p junction diodes by arsenic enhanced diffusion along interfacial misfit dislocations in p‐type epitaxial Si/Si(Ge) , 1994 .
[12] J. W. Matthews,et al. Defects in epitaxial multilayers: I. Misfit dislocations* , 1974 .
[13] S. Takagi,et al. On the origin of increase in substrate current and impact ionization efficiency in strained-Si n- and p-MOSFETs , 2005, IEEE Transactions on Electron Devices.
[14] Junichi Murota,et al. High-mobility strained-Si PMOSFET's , 1996 .
[15] T. Shimizu,et al. A small GSM power amplifier module using Si-LDMOS driver MMIC , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
[16] M. Silberstein,et al. A 90nm high volume manufacturing logic technology featuring novel 45nm gate length strained silicon CMOS transistors , 2003, IEEE International Electron Devices Meeting 2003.
[18] S. Kamohara,et al. High performance RF power LDMOSFETs for cellular handsets formed in thick-strained-Si/relaxed-SiGe structure , 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..
[19] S.C. Chien,et al. Performance of 70 nm strained-silicon CMOS devices , 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).
[20] Y. Yeo,et al. Substrate-strained silicon technology: process integration [CMOS technology] , 2003, IEEE International Electron Devices Meeting 2003.
[21] 清水 昭博,et al. Local Mechanical-Stress Control(LMC): A New Technique for CMOS-Performance Enhancement , 2002 .
[22] Nobuyuki Sugii,et al. Performance enhancement of strained-Si MOSFETs fabricated on a chemical-mechanical-polished SiGe substrate , 2002 .
[23] A. Maiti,et al. Ordering of As impurities in a Si dislocation core , 1997 .
[24] J. Welser,et al. NMOS and PMOS transistors fabricated in strained silicon/relaxed silicon-germanium structures , 1992, 1992 International Technical Digest on Electron Devices Meeting.