Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design

Circuit reliability under statistical process variation is an area of growing concern. For highly replicated circuits such as SRAMs and flip flops, a rare statistical event for one circuit may induce a not-so-rare system failure. The Statistical Blockade was proposed as a Monte Carlo technique that allows us to efficiently filter-to block-unwanted samples insufficiently rare in the tail distributions we seek. However, there are significant practical problems with the technique. In this work, we show common scenarios in SRAM design where these problems render Statistical Blockade ineffective. We then propose significant extensions to make Statistical Blockade practically usable in these common scenarios. We show speedups of 102+ over standard Statistical Blockade and 104+ over standard Monte Carlo, for an SRAM cell in an industrial 90 nm technology.

[1]  Trevor Hastie,et al.  The Elements of Statistical Learning , 2001 .

[2]  Rob A. Rutenbar,et al.  Statistical Blockade: A Novel Method for Very Fast Monte Carlo Simulation of Rare Circuit Events, and its Application , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[3]  Timothy N. Trick,et al.  A Study of Variance Reduction Techniques for Estimating Circuit Yields , 1983, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  George S. Fishman,et al.  A First Course in Monte Carlo , 2005 .

[5]  Kaushik Roy,et al.  Estimation of delay variations due to random-dopant fluctuations in nanoscale CMOS circuits , 2005, IEEE Journal of Solid-State Circuits.

[6]  A. Alvandpour,et al.  High-performance and low-power challenges for sub-70 nm microprocessor circuits , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

[7]  A. McNeil Estimating the Tails of Loss Severity Distributions Using Extreme Value Theory , 1997, ASTIN Bulletin.

[8]  Rajiv V. Joshi,et al.  Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[9]  Jiajing Wang,et al.  Statistical modeling for the minimum standby supply voltage of a full SRAM array , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

[10]  Nello Cristianini,et al.  Advances in Kernel Methods - Support Vector Learning , 1999 .

[11]  Thorsten Joachims,et al.  Making large scale SVM learning practical , 1998 .

[13]  J. Meindl,et al.  The impact of intrinsic device fluctuations on CMOS SRAM cell stability , 2001, IEEE J. Solid State Circuits.

[14]  Kaushik Roy,et al.  Statistical design and optimization of SRAM cell for yield enhancement , 2004, ICCAD 2004.

[15]  A. Chandrakasan,et al.  Analyzing static noise margin for sub-threshold SRAM in 65nm CMOS , 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

[16]  Rob A. Rutenbar,et al.  Beyond Low-Order Statistical Response Surfaces: Latent Variable Regression for Efficient, Highly Nonlinear Fitting , 2007, 2007 44th ACM/IEEE Design Automation Conference.