Nonvolatile memory device including detection circuit for sudden power off and method for detecting sudden power off thereof

The present invention provides a nonvolatile memory device for detecting sudden power off (SPO) itself. The nonvolatile memory device according to the present invention includes: a memory cell array comprising a plurality of memory cells connected to a plurality of bit lines and a plurality of word lines; a word line decoder to apply word line voltages to the word lines; a bit line selector to select at least one of the bit lines; a control logic to control the word line decoder and the bit line selector so that write data is programmed in the memory cell array; and an SPO detection circuit, wherein the SPO detection circuit comprises: a sensing cell; a first driver to provide a first voltage for the sensing cell; and a second driver to provide a second voltage for the sensing cell, wherein a program state of the sensing cell becomes different depending on an order or a time difference between the first driver and the second driver being powered off.