ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers [39]

Router buffers are instrumental in the overall operation of the on-chip network. Besides performance, buffers greatly affect the network’s overall energy budget. In fact, of the different components comprising the interconnection fabric of SoCs, buffers are the largest leakage power consumers in an NoC router, consuming about 64% of the total router leakage power [50]. Similarly, buffers consume significant dynamic power [22,51] and this consumption increases rapidly as packet flow throughput increases [51]. In fact, it has been observed that storing a packet in a buffer consumes far more energy than transmitting the packet [51]. Furthermore, the area occupied by an on-chip router is dominated by the buffers [14,52,53]. Consequently, buffer design plays a crucial role in architecting high performance and energy efficient on-chip interconnects, and is the focus of this section.

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