ASIC and FPGA Implementations of Modern 4-Moduli RNS Reverse Converters Using Distinct Configurations

The reverse converter is the most complex and essential part of residue number system (RNS), and has a significant role in the general performance of RNS. Recently, it is showed that the reverse converter performance could be significantly improved using different adder’s type in the architecture of reverse converters, rather than just using one type of adder topology. This technical report aims to compare implementation results of recent four-moduli reverse converters for different configurations. The 65nm and 90nm application-specific integrated circuit (ASIC) technologies, and Virtex-5 and Virtex-6 field-programmable gate array (FPGA) devices are used to achieve experimental results.