PROMETHEUS: A Proactive Method for Thermal Management of Heterogeneous MPSoCs

In this paper, we propose PROMETHEUS, a framework for proactive temperature aware scheduling of embedded workloads on single instruction set architecture heterogeneous multiprocessor systems-on-chip. It systematically combines temperature aware task assignment, task migration, and dynamic voltage and frequency scaling. PROMETHEUS is based on our novel low overhead temperature prediction technique, Tempo. In contrast to previous work, Tempo allows accurate estimation of potential thermal effects of future scheduling decisions without requiring any runtime adaptation. It reduces the maximum prediction error by up to an order of magnitude. Using Tempo, PROMETHEUS framework provides two temperature aware scheduling techniques that proactively avoid power states leading to future thermal emergencies while matching the performance needs to the workload requirements. The first technique, TempoMP, integrates Tempo with an online multiparametric optimization method to guide decisions on task assignment, migration, and setting core power states in a temperature aware fashion. Our second scheduling technique, TemPrompt uses Tempo in a heuristic algorithm that provides comparable efficiency at lower overhead. On average, these two techniques reduce the lateness of the tasks by 2.5× and energy-lateness product (ELP) by 5× compared to the previous work.

[1]  Li Shang,et al.  Accurate Temperature-Dependent Integrated Circuit Leakage Power Estimation is Easy , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[2]  Krste Asanovic,et al.  Reducing power density through activity migration , 2003, ISLPED '03.

[3]  E.N. Pistikopoulos,et al.  A framework for multi-parametric programming and control — an overview , 2008, 2008 IEEE International Engineering Management Conference.

[4]  Omer Khan,et al.  Hardware/software co-design architecture for thermal management of chip multiprocessors , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

[5]  Luca Benini,et al.  Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization , 2008, 2008 Design, Automation and Test in Europe.

[6]  Michael F. P. O'Boyle,et al.  MiDataSets: Creating the Conditions for a More Realistic Evaluation of Iterative Optimization , 2007, HiPEAC.

[7]  Norman P. Jouppi,et al.  Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core Architectures , 2003, IEEE Computer Architecture Letters.

[8]  Xiaobo Sharon Hu,et al.  Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs , 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[9]  Tajana Simunic,et al.  Utilizing Predictors for Efficient Thermal Management in Multiprocessor SoCs , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[10]  Tajana Simunic,et al.  Predict and act: dynamic thermal management for multi-core processors , 2009, ISLPED.

[11]  Tajana Simunic,et al.  Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor SoCs , 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

[12]  Tajana Simunic,et al.  OS-level power minimization under tight performance constraints in general purpose systems , 2011, IEEE/ACM International Symposium on Low Power Electronics and Design.

[13]  Margaret Martonosi,et al.  Wattch: a framework for architectural-level power analysis and optimizations , 2000, Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201).

[14]  Ronald G. Dreslinski,et al.  The M5 Simulator: Modeling Networked Systems , 2006, IEEE Micro.

[15]  Giovanni De Micheli,et al.  A control theory approach for thermal balancing of MPSoC , 2009, 2009 Asia and South Pacific Design Automation Conference.

[16]  Tajana Simunic,et al.  Accurate Direct and Indirect On-Chip Temperature Sensing for Efficient Dynamic Thermal Management , 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[17]  Farah Mohammadi,et al.  Dynamic compact thermal model of a package , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[18]  Giovanni De Micheli,et al.  Multicore thermal management with model predictive control , 2009, 2009 European Conference on Circuit Theory and Design.

[19]  Ki-Seok Chung,et al.  Benefits of the big . LITTLE Architecture , 2012 .

[20]  Kevin Skadron,et al.  Temperature-aware microarchitecture: Modeling and implementation , 2004, TACO.

[21]  Huazhong Yang,et al.  Accurate temperature-dependent integrated circuit leakage power estimation is easy , 2007 .

[22]  Trevor Mudge,et al.  MiBench: A free, commercially representative embedded benchmark suite , 2001 .

[23]  Tajana Simunic,et al.  Package-Aware Scheduling of embedded workloads for temperature and Energy management on heterogeneous MPSoCs , 2010, 2010 IEEE International Conference on Computer Design.

[24]  Robert H. Halstead,et al.  Matrix Computations , 2011, Encyclopedia of Parallel Computing.

[25]  Margaret Martonosi,et al.  Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management , 2006, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06).