SPICE models for power MOSFETs: an update

Five existing power MOSFET models intended for use with SPICE simulations are reviewed and compared. Methods used for simulating the gate-drain capacitance are evaluated. The internal JFET employed in two of the models is found to be usually unnecessary. A simple two-value capacitance model is recommended. The performance of this model is demonstrated with data obtained from 200 kHz forward converter.<<ETX>>

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