High Density Silicon Photonic Integrated Circuits and Photonic Engine for Optical Co-packaged Ethernet Switch

We present performance of 1.6 Tbps silicon photonic integrated circuits (SiPICs) and their key device components. These high bandwidth density SiPICs enabled fully functional photonic engines (PEs) that can be co-packaged with Ethernet switches and demonstrated IEEE standards compliant interop-link with 400 Gbps DR4 modules.

[1]  Jian Chen,et al.  1.6Tbps Silicon Photonics Integrated Circuit for Co-Packaged Optical-IO Switch Applications , 2020, 2020 Optical Fiber Communications Conference and Exhibition (OFC).

[2]  Richard Jones,et al.  Heterogeneously Integrated InP\/Silicon Photonics: Fabricating Fully Functional Transceivers , 2019, IEEE Nanotechnology Magazine.

[3]  Nick Kucharewski,et al.  Network Architecture in the Era of Integrated Optics , 2018, 2018 Optical Fiber Communications Conference and Exposition (OFC).

[4]  H. Rong,et al.  A 128 Gb/s PAM4 Silicon Microring Modulator With Integrated Thermo-Optic Resonance Tuning , 2019, Journal of Lightwave Technology.