Static allocation of a task tree onto a linear array

The linear array processor architecture is an important class of interconnection structure that is suitable for VLSI. A heuristic algorithm is presented for mapping a task tree onto a linear array to minimize the total execution time. The algorithm partitions the node set of the task tree into clusters and maps these clusters onto processors. Simulation experiments show that the proposed algorithm is much more efficient than a conventional algorithm.<<ETX>>

[1]  Hesham El-Rewini,et al.  Scheduling Parallel Program Tasks onto Arbitrary Target Machines , 1990, J. Parallel Distributed Comput..

[2]  Israel Koren,et al.  A data-driven VLSI array for arbitrary algorithms , 1988, Computer.

[3]  Dipak Ghosal,et al.  Mapping Task Trees onto a Linear Array , 1991, International Conference on Parallel Processing.

[4]  Peter R. Cappello,et al.  A Processor-Time-Minimal Systolic Array for Cubical Mesh Algorithms , 1992, IEEE Trans. Parallel Distributed Syst..