Parallel Machines: Parallel Machine Languages: The Emergence of Hybrid Dataflow Computer Architectures

One: The Problem Domain.- 1.1 Abstract Program Representation.- The WaveFront Example.- Expressions.- Loops.- Data Types.- 1.2 Two Fundamental Issues.- Latency: The First Fundamental Issue.- Synchronization: The Second Fundamental Issue.- 1.3 The Cost of Parallelism.- Assumptions.- Analysis.- 1.4 Summary.- Two: The Importance of Processor Architecture.- 2.1 von Neumann Architectures.- Tolerating Latency.- Synchronization Methods.- Analysis and Summary.- 2.2 Dataflow Architectures.- 2.3 Comparison of Approaches.- 2.4 Summary.- Three: A Dataflow / von Neumann Hybrid.- 3.1 Synthesis.- 3.2 Compilation Target Model.- A Suitable Program Representation.- Support for Synchronization.- Latency.- Overview of the Model.- 3.3 Execution Models.- The Ideal Processor.- The Realistic Processor.- 3.4 Summary.- Four: Compiling for the Hybrid Architecture.- 4.1 DFPG Revisited.- DFPG Instructions.- Codeblocks.- 4.2 Strategic Issues for Partitioning.- Possible Constraints.- Scope.- Examples.- Latency-Directed Partitioning.- Summary.- 4.3 Code Generator.- Overall Goal and Method.- Simplifications.- Partitioning Constraints.- Operand Storage Allocation.- Machine Code Generation and Partitioning.- Optimizer.- Assembler.- 4.4 Summary.- Five: Analysis.- 5.1 Idealized Model.- Static Statistics.- Dynamic Characteristics.- WaveFront Revisited.- Power of a Hybrid Instruction.- 5.2 Realistic Model.- Cache Operating Point.- Cache Robustness.- Parallelism.- Toleration of Latency.- 5.3 Summary.- Six: Conclusion.- 6.1 Summary of the Present Work.- 6.2 Future Work.- 6.3 Related Work.- HEP Revisited.- MASA Revisited.- The UCI Process-Oriented Model Project.- The IBM/ETH Project.- 6.4 Closing Remarks.- References.