Optimal image computations on reduced VLSI architectures

A communication-efficient parallel organization with a reduced number of processors is considered for problems in image processing and computer vision. The organization consists of n processors having row and column access to an n*n array of memory modules which stores an n*n image. It can be looked upon as a reduced mesh-of-trees organization in which the n/sup 2/ leaf processors are replaced by n/sup 2/ memory locations and each row (column) tree is replaced by a single processor with a row (column) bus. The class of image problems considered here requires dense data movement as well as global operations on image pixels. Examples include histogramming, image labeling, computing convexity and nearest neighbors. It is shown that while such problems can be solved in O(n) time on a two-dimensional mesh-connected computer with n/sup 2/ processors, they can also be solved on the proposed organization in O(n) time using n processors only. In addition, all of the parallel solutions presented are processor-time optimal solutions. >

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