Design of a low parasitic inductance SiC power module with double-sided cooling

In this paper, a low parasitic inductance SiC power module with double-sided cooling is designed and compared with a baseline double-sided cooled module. With the unique 3D layout utilizing vertical interconnection, the power loop inductance is effectively reduced without sacrificing the thermal performance. Both simulations and experiments are carried out to validate the design. Q3D simulation results show a power loop inductance of 1.63 nH, verified by the experiment, indicating more than 60% reduction of power loop inductance compared with the baseline module. With 0Ω external gate resistance turn-off at 600V, the voltage overshoot is less than 9% of the bus voltage at a load of 44.6A.

[1]  Zhiqiang Wang,et al.  Parasitic inductance extraction and verification for 3D Planar Bond All Module , 2016, 2016 International Symposium on 3D Power Electronics Integration and Manufacturing (3D-PEIM).

[2]  Dushan Boroyevich,et al.  Experimental parametric study of the parasitic inductance influence on MOSFET switching characteristics , 2010, The 2010 International Power Electronics Conference - ECCE ASIA -.

[3]  L. Stevanovic,et al.  Low inductance power module with blade connector , 2010, 2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC).

[4]  D. Boroyevich,et al.  A 1200-V, 60-A SiC MOSFET Multichip Phase-Leg Module for High-Temperature, High-Frequency Applications , 2014, IEEE Transactions on Power Electronics.

[5]  J. Kolar,et al.  Ultra-Low-Inductance Power Module for Fast Switching Semiconductors , 2013 .

[6]  Zhenxian Liang.  Integrated double sided cooling packaging of planar SiC power modules , 2015, 2015 IEEE Energy Conversion Congress and Exposition (ECCE).

[7]  K. Matsui,et al.  High Junction Temperature and Low Parasitic Inductance Power Module Technology for Compact Power Conversion Systems , 2015, IEEE Transactions on Electron Devices.

[8]  A. Castellazzi,et al.  Highly integrated low-inductive power switches using double-etched substrates with through-hole viases , 2015, 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD).

[9]  Leon M. Tolbert,et al.  Stray Inductance Reduction of Commutation Loop in the P-cell and N-cell-Based IGBT Phase Leg Module , 2014, IEEE Transactions on Power Electronics.

[10]  K. Sugiura,et al.  6-in-1 Silicon carbide power module for high performance of power electronics systems , 2014, 2014 IEEE 26th International Symposium on Power Semiconductor Devices & IC's (ISPSD).

[11]  Dushan Boroyevich,et al.  A frequency-domain study on the effect of DC-link decoupling capacitors , 2013, 2013 IEEE Energy Conversion Congress and Exposition.