Low-leakage current, low-area voltage regulator for system-on-a-chip processors
暂无分享,去创建一个
A low-leakage current, low-area voltage regulator for system-on-a-chip processors is proposed. The system is demonstrated in a 0.13 /spl mu/m CMOS technology with a supply voltage varied between 0.8 and 1.5 V. Using this system, the leakage current and power are reduced by as much as 44/spl times/ and 33/spl times/, respectively, compared to conventional topologies.
[1] Yuan Taur,et al. Fundamentals of Modern VLSI Devices , 1998 .
[2] J. F. Dickson,et al. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique , 1976 .