Testability Concepts for Digital ICs: The Macro Test Approach

Preface. 1. Introduction. 2. Defect-Oriented Testing. 3. Macro Test: A Framework for Testable IC Design. 4. Examples of Leaf-Macro Test Techniques. 5. Scan Chain Routing with Minimal Test Application Time. 6. Test Control Block Concepts. 7. Exploiting Parallelism in Leaf-Macro Access. 8. Timing Aspects of CMOS VLSI Circuits. List of Symbols and Abbreviations. References. Index.