Frequency dependent RLC crosstalk evaluation of a high performance S/390 microprocessor chip

A coupling noise evaluation of a high performance S/390 microprocessor using a full chip RLC extraction and simulation process is presented. Review of on-chip wiring guidelines with respect to the inaccuracies of an RC coupling evaluation for known net topologies is discussed in terms of tool requirements for full-chip noise evaluation which include inductive coupling effects. The extraction and simulation approach is described in terms of algorithms and procedures used to account for the frequency dependent RLC effects in a manner that allow a full chip noise evaluation. Results are presented which compare noise amplitude differences between RC and R(f)L(f)C evaluations for the wiring data of a S/390 microprocessor as well as pertinent statistics such as run times and memory usage.

[1]  Gregory A. Northrop,et al.  Chip integration methodology for the IBM S/390 G5 and G6 custom microprocessors , 1999, IBM Journal of Research and Development.

[2]  Paul W. Coteus,et al.  Frequency-dependent crosstalk simulation for on-chip interconnections , 1999 .

[3]  Keith A. Jenkins,et al.  When are transmission-line effects important for on-chip interconnections? , 1997 .

[4]  Lawrence T. Pileggi,et al.  RICE: rapid interconnect circuit evaluation using AWE , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  Paul W. Coteus,et al.  Multi-line crosstalk and common-mode noise analysis , 2000, IEEE 9th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.00TH8524).

[6]  Howard H. Smith,et al.  On-chip coupled noise analysis of a high performance S/390 microprocessor , 1997, 1997 Proceedings 47th Electronic Components and Technology Conference.