Formullar: An FPGA-based network testing tool for flexible and precise measurement of ultra-low latency networking systems

Abstract As network systems become widespread in emerging time-sensitive domains, latency becomes an important performance factor. Thus, there is a new demand for ultra-low latency (ULL), which requires an extra-ordinarily low latency even in a deterministic manner. To support the ULL requirement, it is mandatory that each network device strictly guarantees this latency. As a result, there is an increasing demand for a precise latency measurement tool that achieves two conflicting goals: high time precision and flexible traffic control. To support these goals, this paper proposes a novel measurement tool, named Formullar , which has a hybrid architecture composed of hardware ( Formullar FPGA) and software ( Formullar controller) layers. Formullar generates packets in an accurate timing, according to the various traffic patterns. The packet generation is controlled in a fully programmable manner that makes the testing fully automated and flexible. Then, latency is measured based on packet generation and reception timing; the measurement is done by the hardware layer, providing highly precise measurement results. Using this carefully constructed system, a Formullar prototype was implemented on top of the commodity FPGA board NetFPGA-SUME. The evaluation indicates that Formullar provides highly precise measurements with nanoseconds precision at a bandwidth of 10 Gbps.

[1]  Eddie Kohler,et al.  Internet research needs better models , 2003, CCRV.

[2]  Junjie Liu,et al.  ITester: A FPGA based high performance traffic replay tool , 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

[3]  Hao,et al.  A High-precision Time Handling Library , 2013 .

[4]  Paul Barford,et al.  Self-configuring network traffic generation , 2004, IMC '04.

[5]  Jinkyu Lee,et al.  MC-SDN: Supporting Mixed-Criticality Scheduling on Switched-Ethernet Using Software-Defined Networking , 2018, 2018 IEEE Real-Time Systems Symposium (RTSS).

[6]  Andreas Herkersdorf,et al.  FlueNT10G: A Programmable FPGA-based Network Tester for Multi-10-Gigabit Ethernet , 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

[7]  B. Melamed,et al.  Traffic modeling for telecommunications networks , 1994, IEEE Communications Magazine.

[8]  Jiye Shi,et al.  Use of Network Latency Profiling and Redundancy for Cloud Server Selection , 2014, 2014 IEEE 7th International Conference on Cloud Computing.

[9]  Andrew W. Moore,et al.  NetFPGA SUME: Toward 100 Gbps as Research Commodity , 2014, IEEE Micro.

[10]  David Walker,et al.  Hardware-Software Co-Design for Network Performance Measurement , 2016, HotNets.

[11]  John W. Lockwood,et al.  Implementing Ultra Low Latency Data Center Services with Programmable Logic , 2015, 2015 IEEE 23rd Annual Symposium on High-Performance Interconnects.

[12]  Thomas Wirth,et al.  A Tactile Internet demonstration: 1ms ultra low delay for wireless communications towards 5G , 2016, 2016 IEEE Conference on Computer Communications Workshops (INFOCOM WKSHPS).

[13]  Sundeep Rangan,et al.  Achieving Ultra-Low Latency in 5G Millimeter Wave Cellular Networks , 2016, IEEE Communications Magazine.

[14]  Rodrigo Fonseca,et al.  Planck , 2014, SIGCOMM.

[15]  Hua Chen,et al.  Pingmesh: A Large-Scale System for Data Center Network Latency Measurement and Analysis , 2015, SIGCOMM.

[16]  Alan S. Brown Google's autonomous car applies lessons learned from driverless races , 2011 .

[17]  Yong Wang,et al.  An FPGA-based high-speed network performance measurement for RFC 2544 , 2015, EURASIP J. Wirel. Commun. Netw..

[18]  Anja Feldmann,et al.  Packet Capture in 10-Gigabit Ethernet Environments Using Contemporary Commodity Hardware , 2007, PAM.

[19]  Philippe Owezarski,et al.  OSNT: open source network tester , 2014, IEEE Network.

[20]  Ted Taekyoung Kwon,et al.  OpenSample: A Low-Latency, Sampling-Based Measurement Platform for Commodity SDN , 2014, 2014 IEEE 34th International Conference on Distributed Computing Systems.

[21]  Bo Wang,et al.  XpressEth: Concise and efficient converged real-time Ethernet , 2017, 2017 IEEE/ACM 25th International Symposium on Quality of Service (IWQoS).

[22]  Dun-fan Ye,et al.  Design and Implementation of High-Precision Timer in Linux , 2009, 2009 WRI World Congress on Computer Science and Information Engineering.

[23]  Carey L. Williamson,et al.  Internet Traffic Measurement , 2001, IEEE Internet Comput..

[24]  Mustafa Sanlı,et al.  FPGEN: A fast, scalable and programmable traffic generator for the performance evaluation of high-speed computer networks , 2011, Perform. Evaluation.

[25]  Branka Vucetic,et al.  Ultra-Reliable Low Latency Cellular Networks: Use Cases, Challenges and Approaches , 2017, IEEE Communications Magazine.

[26]  Gustavo Sutter,et al.  TNT10G: A high-accuracy 10 GbE traffic player and recorder for multi-Terabyte traces , 2014, 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14).

[27]  Antonio Pescapè,et al.  Do you trust your software-based traffic generator? , 2010, IEEE Communications Magazine.

[28]  Ji Yang,et al.  Network recorder and player: FPGA-based network traffic capture and replay , 2014, 2014 International Conference on Field-Programmable Technology (FPT).

[29]  Minlan Yu,et al.  Software Defined Traffic Measurement with OpenSketch , 2013, NSDI.

[30]  Martin Reisslein,et al.  Ultra-Low Latency (ULL) Networks: The IEEE TSN and IETF DetNet Standards and Related 5G ULL Research , 2018, IEEE Communications Surveys & Tutorials.