CMOS Current Conveyor Design and Macromodel

The paper presents the design of second generation current conveyor (CCII) with low voltage regulated cascade current mirrors in CMOS technology. An accurate nonlinear macromodel of CCII has also been developed and results of simulation at transistor level model and macromodel are presented and compared.

[1]  J. Solomon,et al.  Macromodeling of integrated circuit operational amplifiers , 1974 .

[2]  Phillip E. Allen,et al.  A 1.75 V rail-to-rail CMOS op amp , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[3]  Shen-Iuan Liu,et al.  Nonlinear circuit applications with current conveyors , 1993 .

[4]  G. Rao,et al.  Identification of continuous-time SISO systems via Markov parameter estimation , 1993 .

[5]  Alain Fabre,et al.  On the frequency limitations of the circuits based on second generation current conveyors , 1995 .

[6]  B. Wilson,et al.  Recent developments in current conveyors and current-mode circuits , 1990 .

[7]  Hakan Kuntman,et al.  Simple and accurate nonlinear current conveyor macromodel , 1996, Proceedings of 8th Mediterranean Electrotechnical Conference on Industrial Applications in Power Systems, Computer Science and Telecommunications (MELECON 96).

[8]  Brett Wilson Performance analysis of current conveyors , 1989 .

[9]  S. Celma,et al.  Wien-type oscillators using CCII+ , 1995 .