Synthesis of Asynchronous Controllers on FPGA from Generalized Multi-Burst Graph Specification

On promising area application of asynchronous is in Heterogeneous Systems (synchronous and asynchronous modules mixed). Asynchronous controllers are quite used in heterogeneous systems. The specification of theses controllers requires two types of signals: level sensitive signals that are used as conditionals and transition sensitive signals. Another requirement is to describe concurrency between inputs/outputs. The Multi-Burst Graph (MBG) specification allows to describing these controllers in a compact form and it is familiar to designers of digital circuits. This paper proposes a generalization in the MBG specification to increase the ability to describe the interaction between inputs/ outputs, i.e. increase the concurrency between them. This paper also proposes a method that starts from Generalized MBG specification and implements its hazard-free controllers on FPGAs. These devices have been mainly used for design of synchronous controllers. However, it is difficult to design asynchronous controllers on FPGAs, because the circuit may suffer from hazard problems. The method proposed implements this class of asynchronous controllers on FPGAs which are based on Look-Up Table (LUT) architectures. By doing this, the asynchronous circuits besides their intrinsic advantages over synchronous ones may also take advantage of integration, lower costs and short-time design associated with FPGA designs.

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