3-D IC integration technology is recent evolution in IC fabrication which allows reduction of interconnect length, heterogeneous integration of different IC layers ...etc. But one of the challenges faced by 3-D IC is heat mitigation. Over the years to relieve the heating problem in 3-D ICs various passive cooling techniques were proposed. However due to their passive nature, performance is already saturated. So a new technique is proposed to overcome this limitation, called as active cooling technique. This technique uses the Peltier element to mitigate the heat at different IC layers. To demonstrate the advantages of this technique, thermal simulation of a stack consisting of three IC layers bonded face up is performed and extensive case studies are carried out using finite element modeling. It has been observed that by inserting an electrically isolated Peltier element that extends across IC layers to substrate reduced the temperature by ~ 15° K. The initial temperature difference between top IC layer and sink is reduced from ~ 172° K to ~ 16° K i.e a reduction of ~ 90 % compared to ~ 61.7 % with TTSV.
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