Correlation method of circuit-performance and technology fluctuations for improved design reliability
暂无分享,去创建一个
Kyoji Yamashita | Hans Jürgen Mattausch | Shigetaka Kumashiro | Mitiko Miura-Mattausch | Tetsuya Yamaguchi | Shizunori Matsumoto | Masami Suetake | Noriaki Nakayama | D. Miyawaki | S. Ooshiro
[1] S. Kumashiro,et al. HiSIM: a drift-diffusion-based advanced MOSFET model for circuit simulation with easy parameter extraction , 2000, 2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502).
[2] Sung-Mo Kang,et al. Statistical Performance Modeling and Parametric Yield Estimation of MOS VLSI , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[3] Heinz Hoenigschmid,et al. Optimization of advanced MOS technologies for narrow distribution of circuit performance , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[4] Stephen W. Director,et al. A new methodology for the design centering of IC fabrication processes , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[5] Dominique Savignac,et al. Unified complete MOSFET model for analysis of digital and analog circuits , 1994, ICCAD '94.
[6] D.B.M. Klaassen,et al. Sensitivity Analysis of an Industrial CMOS Process using RSM Techniques , 1995 .
[7] O. Prigge,et al. Worst/Best Device and Circuit Performances for MOSFETs Determined from Process Fluctuations , 1999 .
[8] Sani R. Nassif,et al. A Methodology for Worst-Case Analysis of Integrated Circuits , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.