High-Accuracy InductEx Calibration Sets for MIT-LL SFQ4ee and SFQ5ee Processes

The MIT Lincoln Lab SFQ4ee and SFQ5ee process nodes, targeted at energy-efficient superconducting digital circuits, allow the fabrication of complicated multilayer circuit structures. Published per-length inductance values do not hold if ground plane (GP) and sky plane (SP) combinations are changed, or if inductance is distributed over multiple via-connected layers with current return paths determined by the specific placement of sky-to-ground vias. A three-dimensional inductance extraction tool, InductEx, can handle extraction from such complicated multilayer structures with holes in the GPs and SPs. We present calibrated parameter sets for InductEx generated from the analysis of twelve representative test structures. We show that the root-mean-squared-error (RMSE) between InductEx extractions and averaged experimental measurements of self-inductance are below 1% for several calibration sets—The lowest ever reported. The RMSE between calculations and measurements for mutual inductance is also below 1% for the best calibration set—A level also never achieved before.