AnEvolutionary Approach toArea-Time Optimization ofFPGA designs

This paper presents a new methodology basedon evolutionary multi-objective optimization (EMO)tosynthesize multiple complex modules on programmable devices (FPGAs). Itstarts froma behavioral description written ina common high-level language (for instance C)toautomatically produce the register-transfer level (RTL)design ina hardware description language (e.g. Verilog). Sinceallhigh-level synthesis problems (scheduling, allocation andbinding) arenotoriously NP-complete andinterdependent, thethreeproblems shouldbeconsidered simultaneously. Thisdrives toa widedesign space,thatneeds tobethoroughly explored toobtain solutions abletosatisfy the design constraints. Evolutionary algorithms are goodcandidates totackle such complex explorations. Inthis paper we provide a solution based on theNon-dominated Sorting Genetic Algorithm (NSGA-II) to explore thedesign space inorderobtain thebestsolutions in termsofperformance giventhearea constraints ofa target FPGA device. Moreover, ithasbeenintegrated a goodcost estimation modeltoguarantee thequality ofthesolutions found without requiring a complete synthesis forthevalidation ofeach generation, an impractical andtimeconsuming operation. We showon theJPEGcasestudythattheproposed approach provides goodresults intermsoftrade-off between total area occupied andexecution time.