Theory of Flying-Adder Frequency Synthesizers—Part II: Time- and Frequency-Domain Properties of the Output Signal
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[1] Ronald L. Graham,et al. Concrete Mathematics, a Foundation for Computer Science , 1991, The Mathematical Gazette.
[2] Liming Xiu. A Novel DCXO Module for Clock Synchronization in MPEG2 Transport System , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.
[3] Yvon Savaria,et al. A complete spurs distribution model for direct digital period synthesizers , 2005, 2005 IEEE International Symposium on Circuits and Systems.
[4] Yvon Savaria,et al. Spurs modeling in direct digital period synthesizers related to phase accumulator truncation , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).
[5] Rick Booth,et al. Frequency Synthesizers , 2009, 2009 IEEE Custom Integrated Circuits Conference.
[6] J. H. Blythe. The spectrum of a quantized sinusoid , 1985 .
[7] Vadim Manassewitsch. Frequency synthesizers: theory and design, 3rd ed. , 1987 .
[8] G.L. Weaver,et al. Further enhancements to the analysis of spectral purity in the application of practical direct digital synthesis , 2004, Proceedings of the 2004 IEEE International Frequency Control Symposium and Exposition, 2004..
[9] Liming Xiu. A “Flying-Adder” On-Chip Frequency Generator for Complex SoC Environment , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.
[10] Yvon Savaria,et al. A direct digital period synthesis circuit , 2002 .
[11] Frequency synthesis by phase lock, 2nd ed. [Book Review] , 2001, IEEE Circuits and Devices Magazine.
[12] Choong Hun Lee,et al. Prevention of active area shrinkage using polysilicon stepped shallow trench isolation technology , 2003 .
[13] Un-Ku Moon,et al. A Sub-Picosecond Resolution 0.5-1.5GHz Digital-to-Phase Converter , 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..
[14] J. Niittylahti,et al. Exact analysis of spurious signals in direct digital frequency synthesisers due to phase truncation , 2003 .
[15] Liming Xiu,et al. An architecture of high-performance frequency and phase synthesis , 2000, IEEE Journal of Solid-State Circuits.
[16] Liming Xiu. Flying-Adder on-chip frequency synthesis architecture , 2008, 2008 IEEE International SOC Conference.
[17] Kari Halonen,et al. Preface , 2021 .
[18] A. Willson,et al. Exact analysis of DDS spurs and SNR due to phase truncation and arbitrary phase-to-amplitude errors , 2005, Proceedings of the 2005 IEEE International Frequency Control Symposium and Exposition, 2005..
[19] H. Samueli,et al. An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation , 1987, 41st Annual Symposium on Frequency Control.
[20] Yvon Savaria,et al. A direct digitally delay generator , 2000, 2000 International Semiconductor Conference. 23rd Edition. CAS 2000 Proceedings (Cat. No.00TH8486).
[21] Hua Wang,et al. Precision Frequency and Phase Synthesis Techniques in Integrated Circuits for Biosensing, Communication and Radar , 2009 .
[22] Raymond Leslie Midkiff. Digital frequency synthesizer with frequency readout , 1972 .
[23] Ronald L. Graham,et al. Concrete mathematics - a foundation for computer science , 1991 .
[24] J. Nieznanski. An alternative approach to the ROM-less direct digital synthesis , 1998 .
[25] Bar-Giora Goldberg. Digital Techniques in Frequency Synthesis , 1995 .
[26] Liming Xiu,et al. A new frequency synthesis method based on "flying-adder" architecture , 2003, IEEE Trans. Circuits Syst. II Express Briefs.
[27] S. Mehrgardt. Noise spectra of digital sine-generators using the table-lookup method , 1983 .
[28] Ulrich L. Rohde,et al. Microwave and wireless synthesizers: theory and design , 1997 .
[29] Paul-Peter Sotiriadis. Theory of Flying-Adder Frequency Synthesizers—Part I: Modeling, Signals' Periods and Output Average Frequency , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.
[30] Liming Xiu. A Flying-Adder PLL technique enabling novel approaches for video/graphic applications , 2008, IEEE Transactions on Consumer Electronics.
[31] Y. Savaria,et al. Precise free-running period synthesizer (FRPS) with process and temperature compensation , 2007, 2007 50th Midwest Symposium on Circuits and Systems.
[32] Edgar Sanchez-Sinencio,et al. A 2.4-GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier , 2003, IEEE J. Solid State Circuits.
[33] J. F. Garvey,et al. An exact spectral analysis of a number controlled oscillator based synthesizer , 1990, 44th Annual Symposium on Frequency Control.
[34] Liming Xiu,et al. A "Flying-Adder" frequency synthesis architecture of reducing VCO stages , 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[35] Yvon Savaria,et al. Spur Model for a Fixed-Frequency Signal Subject to Periodic Jitter , 2008, IEEE Transactions on Instrumentation and Measurement.
[36] E. C. Titchmarsh,et al. The theory of functions , 1933 .
[37] Dennis R. Morgan,et al. Discrete-time distortion analysis of quantized sinusoids , 1985, IEEE Trans. Acoust. Speech Signal Process..
[38] Victor S. Reinhardt. Direct Digital Synthesizers , 1985 .
[39] David G. Messerschmitt,et al. Analysis of Digitally Generated Sinusoids with Application to A/D and D/A Converter Testing , 1978, IEEE Trans. Commun..
[40] Ping Gui,et al. A wide-tuning-range and reduced-fractional-spurs synthesizer combining Σ-Δ fractional-N and integer Flying-Adder techniques , 2009, 2009 IEEE International Symposium on Circuits and Systems.
[41] Liming Xiu. Some open issues associated with the new type of component: digital-to-frequency converter [Open Column] , 2008, IEEE Circuits and Systems Magazine.
[42] A. N. Willson,et al. Analysis of the output spectrum for direct digital frequency synthesizers in the presence of phase truncation and finite arithmetic precision , 2001, ISPA 2001. Proceedings of the 2nd International Symposium on Image and Signal Processing and Analysis. In conjunction with 23rd International Conference on Information Technology Interfaces (IEEE Cat..
[43] J. Meiners,et al. A novel all-digital PLL with software adaptive filter , 2004, IEEE Journal of Solid-State Circuits.
[44] Ping Gui,et al. Simulation study of Time-Average-Frequency based clock signal driving systems with embedded Digital-to-Analog Converters , 2009, 2009 IEEE International Symposium on Circuits and Systems.
[45] Un-Ku Moon,et al. A Sub-Picosecond Resolution 0.5–1.5 GHz Digital-to-Phase Converter , 2008, IEEE Journal of Solid-State Circuits.
[46] Liming Xiu,et al. A "flying-adder" architecture of frequency and phase synthesis with scalability , 2002, IEEE Trans. Very Large Scale Integr. Syst..