E06: FAST-DCT modified algorithms implemented in FPGA chips for real-time image compression

Abstract The Discrete Cosine Transform (DCT) is one of the basic varieties of transform coding algorithms. Moreover DCT is used in standard algorithms of compression of still image (JPEG) and video compression algorithms (MPEG, H.26x). In case of compression’s images algorithms there are used the blocs: 8×8 pixels. Paper presents problems connected with implementation of DCT algorithms in reconfigurable FPGA structures. Authors implemented DCT transform used Chen’s algorithm, Lee’s algorithm and Loeffler’s algorithm, because these algorithms are most effective for FPGA implementation. Paper presents implementations results in Xilinx chips XCV200BG352.

[1]  Kazimierz Wiatr.  Dedicated Hardware Processors for a Real-Time Image Data Pre-processing Implemented in FPGA Structure , 1997, ICIAP.

[2]  Roger F. Woods,et al.  VLSI architectures for field programmable gate arrays: a case study , 1996, 1996 Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

[3]  Ernest Jamro,et al.  Implementation of multipliers in FPGA structures , 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

[4]  R. Woods,et al.  Image compression algorithms using re-configurable logic , 1997, Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers (Cat. No.97CB36136).