Silicon-on-Sapphire

Abstract : In this presentation, the major issues, which confronted the formation of very thin layers of silicon (30-100 nm) on sapphire substrates for application to sub 100-nm device technology, will be reviewed. The focus of the investigation was, and still is, to achieve a structure in which the modern CMOS technology, the mainstay technology and workhorse of the electronic revolution, can be affordably implemented. In this context, one approach to the obtention of crystalline, device-quality thin film silicon-on- sapphire (TFSOS), namely the double Solid Phase Epitaxy (DSPE), has achieved truly outstanding results which are presently incorporated into high-performance products, such as phase-locked loop (PLL) ICs for wireless communication, and analog-to- digital converters for space application.