Circuit model and signal integrity analysis for multilayer printed circuit board interconnection

A circuit modeling method and signal integrity analysis approach for multilayer printed circuit board interconnection based on the partial equivalent element circuit PEEC method is proposed. The multilayer interconnection structure is divided into a via hole and microstrip lines. A three-dimensional 3D model of a via hole structure is constructed using the PEEC method with Rao-Wilton-Glisson RWG basis functions. The microstrip lines on the top and bottom layers are modeled by PEEC method with RWG basis functions and discrete complex image. The model order reduction method is used to analyze effectively the via hole structure. The equivalent circuit of the via hole structure is simplified, and its physical meaning is defined. The scattering S parameter obtained from the proposed method is consistent with simulation results, which are computed using the commercial 3D electromagnetic field analysis software FEKO. The correctness of the proposed method is validated. The S parameters of different dimensions are simulated, and the effects of these dimensions on the electromagnetic characteristics of the via hole structure are analyzed. The model of the entire structure is used to conduct eye diagram simulation. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:478-489, 2014.

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