Proportionally fair buffer allocation in optical chip multiprocessors
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[1] Alain Greiner,et al. A generic architecture for on-chip packet-switched interconnections , 2000, DATE '00.
[2] Tobias Bjerregaard,et al. A survey of research and practices of Network-on-chip , 2006, CSUR.
[3] W. Dally,et al. Route packets, not wires: on-chip interconnection networks , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[4] Jean C. Walrand,et al. Fair end-to-end window-based congestion control , 2000, TNET.
[5] A. Varga,et al. THE OMNET++ DISCRETE EVENT SIMULATION SYSTEM , 2003 .
[6] R. Soref,et al. All-silicon active and passive guided-wave components for λ = 1.3 and 1.6 µm , 1986 .
[7] D. Geer,et al. Chip makers turn to multicore processors , 2005, Computer.
[8] Qianfan Xu,et al. 12.5 Gbit/s carrier-injection-based silicon micro-ring silicon modulators. , 2007, Optics express.
[9] Luca P. Carloni,et al. Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors , 2008, IEEE Transactions on Computers.
[10] Theo A. C. M. Claasen,et al. An Industry Perspective on Current and Future State of the Art in System-on-Chip (SoC) Technology , 2006, Proceedings of the IEEE.
[11] B. Grundmann,et al. From Single Core to Multi-Core: Preparing for a new exponential , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.
[12] Cary Gunn,et al. CMOS Photonics for High-Speed Interconnects , 2006, IEEE Micro.
[13] H. Haus,et al. Microring resonator channel dropping filters , 1997 .
[14] T. K. Woodward,et al. 1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies , 1999 .
[15] Fabien Mieyeville,et al. System Level Assessment of an Optical NoC in an MPSoC Platform , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.
[16] Yu Zhang,et al. Firefly: illuminating future network-on-chip with nanophotonics , 2009, ISCA '09.
[17] Mikko H. Lipasti,et al. Light speed arbitration and flow control for nanophotonic interconnects , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[18] Alyssa B. Apsel,et al. Leveraging Optical Technology in Future Bus-based Chip Multiprocessors , 2006, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06).
[19] Luca Benini,et al. Networks on Chips : A New SoC Paradigm , 2022 .
[20] Shekhar Borkar. Thousand Core ChipsA Technology Perspective , 2007, DAC 2007.
[21] A. Varga,et al. Using the OMNeT++ discrete event simulation system in education , 1999 .
[22] Luca P. Carloni,et al. Networks-on-chip in emerging interconnect paradigms: Advantages and challenges , 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.
[23] Stephen P. Boyd,et al. Convex Optimization , 2004, Algorithms and Theory of Computation Handbook.
[24] Shaahin Hessabi,et al. Contention-free on-chip routing of optical packets , 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.
[25] Jung Ho Ahn,et al. Devices and architectures for photonic chip-scale integration , 2009 .
[26] Jung Ho Ahn,et al. Corona: System Implications of Emerging Nanophotonic Technology , 2008, 2008 International Symposium on Computer Architecture.
[27] G.E. Moore,et al. Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.
[28] Coniferous softwood. GENERAL TERMS , 2003 .
[29] D.A.B. Miller,et al. Rationale and challenges for optical interconnects to electronic chips , 2000, Proceedings of the IEEE.
[30] William J. Dally,et al. Research Challenges for On-Chip Interconnection Networks , 2007, IEEE Micro.
[31] Michal Lipson,et al. All-optical switching on a silicon chip. , 2004, Optics letters.
[32] Frank Kelly,et al. Rate control for communication networks: shadow prices, proportional fairness and stability , 1998, J. Oper. Res. Soc..