The COSYMA environment for hardware/software cosynthesis of small embedded systems

Abstract COSYMA is a platform for the investigation of hardware/software cosynthesis of small embedded systems. Target architecture is currently limited to processor-coprocessor configurations executing a single process or a system of communicating processes which are statically scheduled. Many aspects of cosynthesis such as automatic hardware/software partitioning, efficient hardware/software communication, timing and hardware overhead estimation and analysis, interdependence of different cosynthesis phases, data representation, etc., can successfully be investigated in this manageable domain. COSYMA covers the complete design flow from an input language similar to C down to netlist and object code. Current focus is on high performance data dominated systems, but first steps to incorporate control dominated subtasks can be presented. Using a specific high-level synthesis tool, the results show a considerable speedup of the resulting processor-coprocessor system even compared to modern RISC processors which is typically limited by memory bandwidth.

[1]  Joos Vandewalle,et al.  Loop Optimization in Register-Transfer Scheduling for DSP-Systems , 1989, 26th ACM/IEEE Design Automation Conference.

[2]  Luciano Lavagno,et al.  A case study in computer-aided codesign of embedded controllers , 1994, CODES.

[3]  Rolf Ernst,et al.  Scalable performance scheduling for hardware-software cosynthesis , 1995, Proceedings of EURO-DAC. European Design Automation Conference.

[4]  Edward A. Lee,et al.  A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures , 1993, IEEE Trans. Parallel Distributed Syst..

[5]  Rolf Ernst,et al.  A path-based technique for estimating hardware runtime in HW/SW-cosynthesis , 1995 .

[6]  Susan L. Graham,et al.  An execution profiler for modular programs , 1983, Softw. Pract. Exp..

[7]  Krzysztof Kuchcinski,et al.  An algorithm for partitioning of application specific systems , 1993, 1993 European Conference on Design Automation with the European Event in ASIC Design.

[8]  Richard N. Taylor,et al.  Combining Static Concurrency Analysis with Symbolic Execution , 1988, IEEE Trans. Software Eng..

[9]  Edward A. Lee,et al.  Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing , 1989, IEEE Transactions on Computers.

[10]  Harvey F. Silverman,et al.  Processor reconfiguration through instruction-set metamorphosis , 1993, Computer.

[11]  Rolf Ernst,et al.  Combining MBP-speculative computation and loop pipelining in high-level synthesis , 1995, Proceedings the European Design and Test Conference. ED&TC 1995.

[12]  Jie Gong,et al.  A Hardware-Software Partitioning Algorithm for Minimizing Hardware , 1993 .

[13]  H. Veit,et al.  CASTLE: an interactive environment for HW-SW co-design , 1994, Third International Workshop on Hardware/Software Codesign.

[14]  Luciano Lavagno,et al.  Hardware-software codesign of embedded systems , 1994, IEEE Micro.

[15]  Gaetano Borriello,et al.  Software Scheduling in the Co-Synthesis of Reactive Real-Time Systems , 1994, 31st Design Automation Conference.

[16]  R. H. J. M. Otten,et al.  The Annealing Algorithm , 1989 .

[17]  Jörg Henkel,et al.  Fast timing analysis for hardware-software co-synthesis , 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

[18]  John Forrest,et al.  A development environment for the cosynthesis of embedded software/hardware systems , 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

[19]  Giovanni De Micheli,et al.  Synthesis and simulation of digital systems containing interacting hardware and software components , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[20]  James R. Larus,et al.  Optimally profiling and tracing programs , 1992, POPL '92.

[21]  Jie Gong,et al.  Software estimation from executable specifications , 1994 .

[22]  Ahmed Amine Jerraya,et al.  COSMOS: a codesign approach for communicating systems , 1994, Third International Workshop on Hardware/Software Codesign.

[23]  G. De Micheli,et al.  The Olympus Synthesis System for Digital Design , 1990 .

[24]  Rolf Ernst,et al.  COSYMA: a software-oriented approach to hardware/software codesign , 1994 .

[25]  Rolf Ernst,et al.  Adaptation Of Partitioning And High-level Synthesis In Hardware/software Co-synthesis , 1994, IEEE/ACM International Conference on Computer-Aided Design.

[26]  Aloysius K. Mok,et al.  Evaluating tight execution time bounds of programs by annotations , 1989 .

[27]  Chung Laung Liu,et al.  Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment , 1989, JACM.

[28]  Axel Jantsch,et al.  Hardware/software partitioning and minimizing memory interface traffic , 1994, EURO-DAC '94.

[29]  Rolf Ernst,et al.  Experiments with low-level speculative computation based on multiple branch prediction , 1993, IEEE Trans. Very Large Scale Integr. Syst..