论文信息 - A 1.2V direct background digital tuned continuous-time bandpass sigma-delta modulator

A 1.2V direct background digital tuned continuous-time bandpass sigma-delta modulator

A 1.2 V continuous-time bandpass sigma-delta modulator implemented in a conventional 1.5 µm CMOS process is presented. Low supply voltage is achieved using biased inverting opamp configuration technique. The modulator is tuned using a direct background digital tuning technique, which measures the noise spectral densities of the modulator output digitally during normal operation and adjusts the tuning code according to the measured spectral densities. No extra ADC or DAC are required. For a sampling rate of 4 MHz, the maximum SNDR after tuning was measured to be 44.6 dB and the power dissipation was 2.1 mW.

E.K.F. Lee | Huanzhang Huang

[1] V. Peluso,et al. A 900 mV 40 /spl mu/W switched opamp /spl Delta//spl Sigma/ modulator with 77 dB dynamic range , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[2] A. Tammineedi,et al. Low-voltage analog circuit design based on biased inverting opamp configuration , 2000 .

[3] W. Snelgrove,et al. Design and implementation of a tunable 40 MHz-70 MHz Gm-C bandpass /spl Delta//spl Sigma/ modulator , 1997 .

[4] K. Halonen,et al. Programmable direct digital tuning circuit for a continuous-time filter , 2000, Proceedings of the 26th European Solid-State Circuits Conference.

[5] E.K.F. Lee,et al. A 1V active RC filter with on–chip frequency and Q tuning , 1999 .

[6] Michiel Steyaert,et al. Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages , 1994, IEEE J. Solid State Circuits.