New methodology for localizing faults in programmable and commercial circuits

Abstract Localizing faults in integrated circuits when the CAD information is unavailable is a critical operation for failure analysis. IFA (Image Fault Analysis), a method based on the comparison of voltage contrast images is capable of offering a positive result. However, the time required for the localization can be excessive. For this reason, we have developed a methodology to insure the minimal time necessary for localization. We will present this new methodology and an application on an Altera fpga programmable circuit.