Transactor-based Prototyping of Heterogeneous Multiprocessor System-On-Chip Architectures

We present the prototyping of a heterogeneous multiprocessor system-on-chip (MPSoC) design, which consists of general purpose RISC processors as well as novel accelerators in form of tightly-coupled processor arrays (TCPA). In general, TCPAs are well suited to accelerate numerous compute-intensive tasks such as video and other digital signal processing. We consider a transactor-based co-design approach where the TCPA is implemented on a CHIPit system and performs image processing of video data in real-time, whereas parts for control and configuration management of the MPSoC are realized in software on the host PC. For interaction between the two parts, the Synopsys Transactor Reference Library is used. The design employs an AHB bus where some components are in the FPGA whereas other components are implemented in software and are communicating to the bus using AMBA transactors. This co-design approach significantly reduces design time when evaluating architecture alternatives.

[1]  Jorg Henkel,et al.  i-Core: A run-time adaptive processor for embedded multi-core systems , 2011 .

[2]  Jörg Henkel,et al.  Invasive manycore architectures , 2012, 17th Asia and South Pacific Design Automation Conference.

[3]  Jürgen Teich,et al.  A highly parameterizable parallel processor array architecture , 2006, 2006 IEEE International Conference on Field Programmable Technology.

[4]  Jürgen Teich,et al.  Invasive Computing: An Overview , 2011, Multiprocessor System-on-Chip.