Hybrid Simulation for Energy Estimation of Embedded Software
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[1] Brad Calder,et al. Picking statistically valid and early simulation points , 2003, 2003 12th International Conference on Parallel Architectures and Compilation Techniques.
[2] Miodrag Potkonjak,et al. MediaBench: a tool for evaluating and synthesizing multimedia and communications systems , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.
[3] John Bloomer,et al. Power Programming with RPC , 1992 .
[4] Thomas F. Wenisch,et al. SMARTS: accelerating microarchitecture simulation via rigorous statistical sampling , 2003, ISCA '03.
[5] Pierre G. Paulin,et al. System-on-chip beyond the nanometer wall , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[6] Jianwen Zhu,et al. DynamoSim: a trace-based dynamically compiled instruction set simulator , 2004, ICCAD 2004.
[7] Anish Muttreja,et al. Automated Energy/Performance Macromodeling of Embedded Software , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[8] Rainer Leupers,et al. A universal technique for fast and flexible instruction-set architecture simulation , 2002, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[9] R. H. Myers. Classical and modern regression with applications , 1986 .
[10] Susan Horwitz,et al. Pointer-Range Analysis , 2004, SAS.
[11] Bjarne Stroustrup,et al. C++ Programming Language , 1986, IEEE Softw..
[12] Nikil D. Dutt,et al. An efficient retargetable framework for instruction-set simulation , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).
[13] Heinrich Meyr,et al. Compiled Simulation of Programmable DSP Architectures , 1997, J. VLSI Signal Process..
[14] Nikil D. Dutt,et al. Instruction set compiled simulation: a technique for fast and flexible instruction set simulation , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[15] J. Woods,et al. Probability and Random Processes with Applications to Signal Processing , 2001 .
[16] Trevor Mudge,et al. MiBench: A free, commercially representative embedded benchmark suite , 2001 .
[17] Sharad Malik,et al. Automated synthesis of efficient binary decoders for retargetable software toolkits , 2003, DAC '03.
[18] Niraj K. Jha,et al. Energy macromodeling of embedded operating systems , 2005, TECS.
[19] Donatella Sciuto,et al. Library functions timing characterization for source-level analysis , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[20] George C. Necula,et al. CIL: Intermediate Language and Tools for Analysis and Transformation of C Programs , 2002, CC.
[21] John Yates,et al. FX!32 a profile-directed binary translator , 1998, IEEE Micro.
[22] Anantha Chandrakasan,et al. JouleTrack: a web based tool for software energy profiling , 2001, DAC '01.
[23] Niraj K. Jha,et al. High-level energy macromodeling of embedded software , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[24] Daniel D. Gajski,et al. A retargetable, ultra-fast instruction set simulator , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).
[25] Lizy Kurian John,et al. Run-time modeling and estimation of operating system power consumption , 2003, SIGMETRICS '03.
[26] Thomas F. Wenisch,et al. TurboSMARTS: accurate microarchitecture simulation sampling in minutes , 2005, SIGMETRICS '05.