Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-K dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-K dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/ A(2-5 /spl times/ 10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8 /spl times/ 10/sup 17/ cm/sup -3/ eV/sup -1/ to 1, 3 /spl times/ 10/sup 19/ cm/sup -3/ eV/sup -1/ somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-K/gate stacks, relative comparison among them and to the Si-SiO/sub 2/ system.

[1]  Chih-Wei Yang,et al.  Effect of polycrystalline-silicon gate types on the opposite flatband voltage shift in n-type and p-type metal–oxide–semiconductor field-effect transistors for high-k-HfO2 dielectric , 2003 .

[2]  K. Onishi,et al.  Fabrication of high quality ultra-thin HfO/sub 2/ gate dielectric MOSFETs using deuterium anneal , 2002, Digest. International Electron Devices Meeting,.

[3]  Shinichi Takagi,et al.  A comprehensive study of MOSFET electron mobility in both weak and strong inversion regimes , 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

[4]  Fang Wang,et al.  Model for random telegraph signals in sub-micron MOSFETS , 2003 .

[5]  S.H. Bae,et al.  MOS characteristics of ultrathin CVD HfAlO gate dielectrics , 2003, IEEE Electron Device Letters.

[6]  D. Schroder,et al.  Impact of post-oxidation annealing on low-frequency noise, threshold voltage, and subthreshold swing of p-channel MOSFETs , 2004, IEEE Electron Device Letters.

[7]  E. P. Vandamme,et al.  Critical discussion on unified 1/f noise models for MOSFETs , 2000 .

[8]  M. Marin,et al.  Impact of scaling down on 1/f noise in MOSFETs , 2003, SPIE International Symposium on Fluctuations and Noise.

[9]  E. H. Nicollian,et al.  Mos (Metal Oxide Semiconductor) Physics and Technology , 1982 .

[10]  T. Ma,et al.  Mobility measurement and degradation mechanisms of MOSFETs made with ultrathin high-k dielectrics , 2004, IEEE Transactions on Electron Devices.

[11]  A. Lacaita,et al.  Quantum effects on the extraction of MOS oxide traps by 1/f noise measurements , 1999 .

[12]  T. Ma.  High-k gate dielectrics for scaled CMOS technology , 2001, 2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443).

[13]  C. Hu,et al.  A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors , 1990 .

[14]  M.F. Li,et al.  Quantum tunneling and scalability of HfO2 and HfAlO gate stacks , 2002, Digest. International Electron Devices Meeting,.

[15]  Nuditha Vibhavie Amarasinghe,et al.  Complex random telegraph signals in 0.06 μm2 MDD n-MOSFETs , 2000 .

[16]  Nuditha Vibhavie Amarasinghe,et al.  Extraction of oxide trap properties using temperature dependence of random telegraph signals in submicron metal-oxide-semiconductor field-effect transistors , 2001 .

[17]  R. V. van Dover,et al.  High K gate dielectrics for the silicon industry , 2001, Extended Abstracts of International Workshop on Gate Insulator. IWGI 2001 (IEEE Cat. No.01EX537).

[18]  Fang Wang,et al.  An improved physics-based 1/f noise model for deep sub-micron MOSFETs , 2001 .

[19]  H. Wagemann,et al.  Investigation and modeling the surface mobility of MOSFETs from -25 to +150 degrees C , 1988 .

[20]  Petr Vasina,et al.  Channel length scaling of 1/f noise in 0.18 μm technology MDD n-MOSFETs , 1999 .

[21]  Improved film growth and flatband voltage control of ALD HfO/sub 2/ and Hf-Al-O with n/sup +/ poly-Si gates using chemical oxides and optimized post-annealing , 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

[22]  Robert M. Wallace,et al.  ELECTRICAL PROPERTIES OF HAFNIUM SILICATE GATE DIELECTRICS DEPOSITED DIRECTLY ON SILICON , 1999 .

[23]  A. Stesmans,et al.  Variation in the fixed charge density of SiOx/ZrO2 gate dielectric stacks during postdeposition oxidation , 2000 .

[24]  R. Wallace,et al.  Hafnium and zirconium silicates for advanced gate dielectrics , 2000 .

[25]  G. Bersuker,et al.  Conventional n-channel MOSFET devices using single layer HfO/sub 2/ and ZrO/sub 2/ as high-k gate dielectrics with polysilicon gate electrode , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

[26]  Gerard Ghibaudo,et al.  Low-frequency noise and fluctuations in advanced CMOS devices , 2003, SPIE International Symposium on Fluctuations and Noise.

[27]  G. D. Wilka,et al.  APPLIED PHYSICS REVIEW High- k gate dielectrics: Current status and materials properties considerations , 2001 .

[28]  L. Ragnarsson,et al.  Ultrathin high-K gate stacks for advanced CMOS devices , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

[29]  Robert M. Wallace,et al.  Stable zirconium silicate gate dielectrics deposited directly on silicon , 2000 .

[30]  F. Hooge.  1/f noise sources , 1994 .

[31]  Z. Çelik-Butler,et al.  Characterization of oxide traps in 0.15 μm2 MOSFETs using random telegraph signals , 2000 .

[32]  T. Ma,et al.  Charge trapping in ultrathin hafnium oxide , 2002, IEEE Electron Device Letters.

[33]  J.C. Lee,et al.  Interfacial defect states in HfO/sub 2/ and ZrO/sub 2/ nMOS capacitors , 2002, IEEE Electron Device Letters.

[34]  Shinichi Takagi,et al.  Different Contribution of Interface States and Substrate Impurities to Coulomb Scattering in Si MOS Inversion Layer , 1994 .

[35]  Gérard Ghibaudo,et al.  Electrical noise and RTS fluctuations in advanced CMOS devices , 2002, Microelectron. Reliab..

[36]  C.H. Choi,et al.  Characterization and reliability of dual high-k gate dielectric stack (poly-Si-HfO2-SiO2) prepared by in situ RTCVD process for system-on-chip applications , 2003, IEEE Electron Device Letters.

[37]  I. Lundström,et al.  Low frequency noise in MOS transistors—I Theory , 1968 .

[38]  T. Nigam,et al.  50 nm vertical replacement-gate (VRG) nMOSFETs with ALD HfO/sub 2/ and Al/sub 2/O/sub 3/ gate dielectrics , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).